Resume 4

Position Desired:

Position as an electrical engineer, with interests in ASIC design, digital and analog circuit design, and embedded software.

Iowa State University, Ames, Iowa 1991 to 1995
B.S., Electrical Engineering, December 1995
G.P.A.: 3.82/4.00

• Experience in digital circuit design, including Intel x86 and i960, ARM, and Rockwell AAMP processors;
• PCI and AMBA buses;
• serial links including Fibre Channel, Infiniband, ethernet, LVDS, RS232, and various ARINC protocols;
• SRAM and DRAM buses
• SCSI
• PLD logic design
• Analog circuit design including active analog filters, amplifiers, and power circuitry
• Experience with circuit simulation tools, including P-Spice and Saber
• C, C++, VB, Ada, Assembly, Verilog, and VHDL
• Experience with Boundary Scan JTAG
• Experience with Synopsys simulation and synthesis tools
• Schematic capture with Viewlogic and Accel

Worked on embedded SCSI controller ASIC.

• The design included integration of an ARM processor, ARC DSP, SCSI controller, and various peripherals, including interrupt controller, timers, etc.
• The ARM was the main microprocessor, communicating over an AMBA bus to the various peripherals.
• ASIC design was done in Verilog, using Synopsys tools.
• Code written in C, assembly, and Verilog to test ARM and peripheral functionality.
• Low level work done on JTAG to test In Circuit Emulator ICE functionality.

High speed 1 GHz + digital and analog design for Fibre Channel applications.

• Implementation of embedded systems.
• Systems are centralized around one or more ASIC s which implement high-speed switching of Fibre Channel data.
• The ASIC sends and receives parallel data streams through serializer/deserializers SER/DES , which serialize the data and send it to the outside world. My part includes timing and logic analysis of the ASIC to ensure proper operation with the SER/DES and other ASIC s.
• The system is managed by an embedded PC-based supervisory system. My part with this included mating the PC to on-board PCI devices and other memory and I/O devices.
• Wrote PLD "glue" logic to interface peripheral devices to the PC.
• Aided in writing and debugging software drivers for these devices.
• Perform timing analysis for all interfaces.
• Developed an in-circuit PROM programmer through a JTAG port.

• PLC logic programming and Human-Machine Interface programming.
• PLC coding to automate food, beverage, and animal feed production facilities.
• HMI programming with Wonderware to develop user-friendly interfaces to production lines and machines.
• Program Management and Field Support.

• Design of automated test equipment ATE s for commercial avionics. The ATE s were used to automate the test of commercial avionics, for factory production test and service center debug and support. Also wrote code to operate these ATE s in lab and factory environments. The code would control test instruments over GPIB, VXI, RS232, and other interfaces.

• Specialized in processor bus emulation and test. Designed processor bus interface circuit cards to connect a processor bus to an emulator. This included research into processor bus transactions and timing, digital and analog hardware design, logic design, simulation using P-Spice and Saber , board layout, and debug. Developed cards to test Intel x86, Texas Instruments DSP, Rockwell AAMP processor buses and all associated memories and peripherals.

• Did much work with Boundary Scan JTAG test development. This included writing applications in C and C++ to execute tests. These tests exercised the primary processor, PLD, and ASIC components of a board, along with direct or indirect test of other peripheral devices not directly attached to the Boundary Scan Chain.

• Analog design, including filtering and wave shaping. Also included utilizing techniques for noise control in analog and digital systems.

Alpha Sigma Phi Fraternity: Vice President and Academic Chair.
Dean s list every semester at Iowa State.
Tau Beta Pi, Eta Kappa Nu, Phi Kappa Phi, and Golden Key Honor Societies.