Resume 7

Objective

An opportunity to enhance the success of a quality high technology company by providing technical and other contributions such as design and problem solving capability.

• Digital, Analog, and RF Circuit & System Design
• Wireless and Wireline Telecommunications
• UNIX, LINUX, DOS, Windows
• Java, C/C++, BASIC, FORTRAN, HTML
• TCP/IP Network Programming
• Database Structures & Programming
• Cadence, Mentor Graphics, OrCAD, ViewLogic, AutoCAD
• FPGA Design in Verilog, VHDL
• T1, E1, SONET, ATM, ISDN, SS7

• Providing hardware and software technical consulting services to commercial clients in a wide variety of industries and technologies.
• Created system level design for major automotive electronics manufacturer of an embedded controller based automotive energy management system.
• Provided expertise in analog circuits by performing PSPICE simulation and analysis in support of the development of a Lithium Polymer battery management system.
• Created system level design of device to adapt single mode Resilient Packet Ring optical ethernet system to operate as a multiple ring CWDM system.
• Designed high speed digital hardware for a 2.5Gbps interface control plug-in module for a DWDM combination SONET & IP optical networking system.
• Created system level design of DSP based jitter/wander plug-in module for a portable digital transmission test set.
• Created Java test software for porting verification/debugging of embedded Java virtual machine to an embedded Linux platform.

• Designed OC-3 SONET/ATM interface module capable of long, medium, and short reach single-mode and multi-mode for a fiber optic multiplexer/access system.
• Used knowledge of high frequency design/RF/Analog techniques to integrate 155 MBps optical modules with ASIC s.
• Designed programmable logic for Altera and Vantis FPGA s, using Verilog.
• Provided design support to other design projects that were behind schedule, and brought them up to date.
• These included a DS-1 tributary interface module, high frequency signal analysis and verification of back plane design, specialized test hardware, and a PowerPC based system control module.

• Designed system architecture and hardware for T1 and E1 transmission network echo cancellers used in IXC, Cellular, PCS and Satellite environments.
• The new design incorporated a cluster controller to allow intelligent network management and compatibility with SS7 call set-up.
• General purpose DSP s Motorola 56302 allowed flexibility to upgrade echo cancellation and audio processing algorithms.

• Conceived of and designed FITL Drop Test Unit using A/D and D/A conversion and a 68HC11 micro-controller, to reduce cost, space requirements, and power consumption over previous analog design.
• Designed FPGA to adapt T1/SLC96 DLC system to support Motorola Cablecomm/TCI coaxial cable-TV PCS field trial.
• Served as technical liaison between several departments in specifying and coordinating systems requirements for a high capacity FITL Optical Network Unit offering a wide variety of communications services.
• Recommended adapting and marketing FITL and DLC systems for use in PCS networks.
• Training in ViewLogic.

• Integrated T1/E1 operability into the original analog Unipage paging terminal by designing T1 and E1 digital trunk interface sub-system and modifying the backplane and analog trunk interface cards.
• Also, designed a system alarm panel and other hardware for Unipage terminals.
• Conceived of and proposed new architecture for next generation wireless terminal, which would provide traditional radio paging services, but also allow migration toward PCS and two-way paging.
• This architecture provided greater flexibility to development of new services, as well as compatibility with existing hardware and software.
• As the company specialized in quickly providing custom tailored solutions, this architecture emphasized flexibility by using generic hardware, which could perform multiple functions through software.
• A uniform backplane design allowed any card to be positioned anywhere within a shelf and provide fault protection through redundancy.
• Depending upon the software load, a generic DSP card would perform multiple functions such as DTMF, MFR1, or MFR2 tone detection/generation, voice encoding/compression for voice mail storage and voice paging transmissions, or future applications.
• A generic digital telco interface could be provisioned to operate as a T1, E1, or ISDN Pri interface.
• A generic analog telco interface could be provisioned to operate with commonly used 2-wire or 4-wire special services or POTS lines.
• Generic hardware would also have the advantage of reduced inventory burden.

Bachelor of Science Electrical Engineering Texas A&M University, 1987 - 1991

• Electromagnetic Theory
• Applied Electromagnetics
• Microwave RF Circuits & System Design
• Analog Digital Communications Theory
• Digital Signal Processing
• Digital Analog Circuit Design
• C Language Programming

• Digital Voice Telephony Link
• Infrared Pulse Train Detector/Decoder
• Log Periodic Array Wideband Directional Antenna
• Computer Modeling for Microstrip Filters
• 2.4 GHz Micro-strip Bandpass Filter