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Resume 10
THOMAS STONES
SUMMARY:
DSP PROGRAMMING
SIGNAL PROCESSING
DIGITAL HARDWARE DESIGN ENGINEER
SKILLS:
- DSP PROCESSORS / COMPONENTS:
TI: TMS320C20/C25, C50/52/57, F240, LF2407, C548, VC5410, C6201
Motorola: DSP56002, DSP56303, DSP56F805;
ADI: ADSP2101
Digital Filters, Correlators, Viterbi Decoders, MAC s, NCO s, etc.
- DIGITAL CIRCUIT COMPONENTS:
Logic families: TTL, LSTTL, FAST, CMOS, HCMOS, ECL, etc.
Memories: RAM s, ROM s, PROM s, EPROM s, FLASH, etc.
Assorted Microprocessors, UART s, PAL s, ALU s, etc.
- ANALOG CIRCUIT COMPONENTS:
A/D and D/A Converters, Active and Passive Filters, Analog Switches,
Operational Amplifiers, Voltage Regulators, Oscillators, Comparators,
Opto Isolators, LED/LCD Displays, Video Cameras, Monitors, Transistors,
Rectifiers, SCR s, TRIAC s, Line Drivers/Receivers, Delta Sigma, etc.
- SOFTWARE:
MATLAB ver-4/5 , C, DOS, Windows, Word, Excel, Coreldraw, etc.
Assembly Language: Ass t uProcessors, Z-80, TMS320Cxxx / DSP56xxx
DSP tools: Code Composer, Code Composer Studio, CodeWarrior
P-CAD 2000 PCB layout , PROTEL Advanced Schematic ver 3.0
Future-Net PC based schematic capture software pkg.
PADS-PCB PC based printed circuit board layout pkg.
EDUCATION:
MSEE 1985 from University of Southern California - USC
Additional engineering courses taken in EEE program at USC
BSEE 1982 from California State University, Northridge - CSUN
Areas of interest: Communications, Digital Signal Processing DSP
Member of Tau Beta Pi, Member of IEEE
Registered Professional Engineer PE - State of California
SUMMARY:
I have had extensive experience as a hardware/software design engineer
doing digital logic design and assorted signal processing programming
tasks for various companies over the past several years. I have worked
both as a permanent employee and, most recently, as a contract engineer
both independently and through various contract houses .
My experience includes hardware and software design of dedicated high
speed circuitry as well as microprocessor controlled embedded systems.
In addition, I have designed both hardware and software to implement
digital signal processing DSP functions including digital filtering
FIR and IIR , signal modulation, demodulation, detection, analysis,
synthesis, convolution, correlation, coding, etc. I am also familiar
with low-frequency sub-microwave analog components / circuit design.
In addition to the above design experience, I also have strong problem
solving and troubleshooting skills.
Academic coursework has included such topics as Linear System Theory,
Digital Signal Processing, Communication Theory, Spectral Estimation,
Error Correction Coding, etc. I am familiar with Laplace / Z / Fourier
Transforms continuous and discrete time , FFT s, Digital Filtering,
Sampling, Decimation, Interpolation, Multirate Signal Processing, etc.
RECENT EMPLOYMENT HISTORY:
2001 - 2002 Randolph Labs
CONTRACT ENGINEER
- Continuation of signal processing software design tasks from a prior
contract assignment with the same company to add new features to the
companies vibration analysis equipment.
- Design work included assembly
and C-code routines to implement multibank "tracking" filters these are
independent, constant-Q, IIR bandpass filters with programmable center
frequencies .
- Also designed multibank "broadband" filters similar but
with wider passbands and programmable high and low band edges .
- Wrote
code to compute RMS and average absolute value metrics from the above
filter outputs.
- Implemented a large 2M word data acquisition buffer
for signal analysis in the time domain.
- Added software functions for
doing FFT averaging up to 128 averages for up to 128K FFT s in each of
4 independent channels .
- Averaging could be done either non-coherently
FFT magnitude only or, coherently in vector form .
- Various "channel
math" operations could be performed on the final averaged FFT results.
2000 - 2002 Irving Co.
CONTRACT ENGINEER
- Initially translated older 80251 assembly code files into newer C-code
routines. Then developed both C and assembly code software for use in
controlling a new Uninterruptable Power Supply UPS design. The code
executed on a Motorola DSP56F805 DSP chip and was developed with the
Metrowerks now Motorola CodeWarrior compiler tools.
- The design made
extensive use of the DSP s internal peripherals PWM s, A/D s, Timers,
etc. to save on external hardware.
- The design included software which
implemented various closed loop control algorithms.
2000 - 2002 R & D, Inc.
CONTRACT ENGINEER
- Brief contract assignment to instruct one of the companies programmers
on programming procedures for a LF2407 motor control DSP chip using a
Spectrum Digital evaluation board.
- Developed skeleton code routines to
demonstrate how to program the chip s PWM modules, Timers, Interrupt
Vectors, burning internal FLASH memory, etc. for use in various designs.
- Wrote misc assembly code routines to help speed up the final code.
2000 - 2001 Digital Design
CONTRACT ENGINEER
- Extensively debugged and documented legacy software written entirely
in ADSP2101 assembly code for use in a digital receiver.
- Discovered and
corrected several subtle design bugs embedded in the original assembly
code to improve receiver performance.
- Provided detailed descriptions of
the code s signal processing routines all previously undocumented .
2000 Satellite Systems
CONTRACT ENGINEER
- Brief contract to evaluate some existing PC based C-code software and
then translate it into new C and/or assembly code routines to run on a
VC5410 DSP processor.
- The application involved image compression/coding
routines.
- After discovering several errors in the initial software and
running some preliminary DSP test code on a VC5410 evaluation board, the
company went out of business and the contract was never completed.
1999 - 2000 Atenko, Inc.
CONTRACT ENGINEER
- Brief contract to evaluate a Spectrum "Daytona" dual C6201 DSP board for
use in a GPS related project.
- Due to an internal company reorganization
which resulted in their being acquired by another company, the contract
was canceled.
1999 Star United Co.
CONTRACT ENGINEER
- Translated old signal processing code originally designed to operate on
the now obsolete TMS320C14 DSP processor to the newer TMS320F240 for a
new line tracer pipe locator product.
1998 - 1999 Advanced Processing Code
CONTRACT ENGINEER
- Extensively debugged and cleaned up existing DSP56002 signal processing
code to vastly improve the performance of earlier company products for
use in vibration analysis and rotor/prop balancing applications.
- Then,
translated the entire design to run on a newer DSP56303 DSP processor.
- Added additional features to greatly enhance performance for an entirely
new product line.
- Software design included both assembly as well as C
code routines to implement large block floating point FFT s and various
other signal processing functions such as digital decimation filtering,
programmable time windowing, scaling, zooming, etc.
1998 Crayton Systems
CONTRACT ENGINEER
- Debugged a prototype TMS320C548 DSP controller board for a 100kW power
protection system.
- Wrote C548 assembly code test routines.
- Designed an
RS-232 interface to communicate with the DSP processor.
- Helped redesign
and layout their next generation signal processor board.
1997 Techical Design
CONTRACT ENGINEER
- Designed assembly language DSP code algorithms for the TMS320C50 / C57
processors to implement various signal processing functions such as AGC,
DTMF detection, FSK detection, FFT spectral analysis, tone detection,
digital FIR/IIR bandpass, lowpass, notch filters, etc.
- Brief contract to design TMS320C50 assembly code interface routines to a
PIC microcontroller as initial work for a new communications project.
- Designed digital hardware to generate test data sequences synchronized
to the scan rate of a CCD camera and frame grabber board as a proof of
concept for a new optical correlator design.
- Designed software to implement a realtime 20-channel multiplexed digital
filter processor used to post-filter data from a bank of delta sigma A/D
converters in an automotive test bed application. The routines were all
written in assembly code for a TMS320C52 DSP processor.
1995 - 1996 Computer Communications
ADJUNCT INSTRUCTOR
- Taught various courses and labs in Electronics, DC Circuit Analysis, AC
Circuit Analysis and Calculus.
1984 - 1996 TechnoFax, Inc.
EMPLOYEE / CONTRACTOR
Designed digital and analog circuits and directed digital design in
Digital Systems Research Lab while working on the following projects:
BIG VITERBI DECODER BVD : Designed digital and analog hardware to
implement a programmable constraint length K max K=15 , rate 1/r
r=2,3,4,5,6 Viterbi Decoder for the decoding of spacecraft data.
Hardware design included both analog and digital gaussian noise sources,
simulated data generators, programmable data encoders, SNR and Bit Error
Rate BER estimation, Symbol Sync and Node Sync Correlation circuitry,
internal self-test circuitry, etc.
SHUTTLE IMAGING RADAR SIR-C : Designed a data demultiplexing system
used to descramble information recorded on the Space Shuttle s high
density data recorders, a multi-tape buffering unit used to make copies
of the master tapes received from the shuttle and a high speed parallel-
to-serial converter.
GALILEO S-BAND PROJECT: Worked on contract to develop a multichannel
RF 295 MHz test signal generator used to simulate the Spacecraft s
transmitted S-band output signal. This was used as a test signal
source for the rest of the project whose function was to maximize the
return data rate from the spacecraft which was greatly diminished due
to an antenna malfunction .
MOBILE SATELLITE EXPERIMENT MSAT-X : Designed an all digital data
modulator-demodulator 8-PSK modem using the TMS32020/C25 series of
DSP processors. Design included a Z-80 controlled RS-232 interface to
an IBM-PC for software development and downloading program code into
the TMS32020/C25 processor boards. Designed both analog and digital
filters to remove intersymbol interference by pulse shaping using
square root, raised cosine pulse shapes the transmitted symbols.
ADVANCED RECEIVER PROJECT: Designed electronics for an all digital
receiver including an I/Q quadrature demodulator with decimation
filtering and other assorted signal processing circuitry .
SEARCH FOR EXTRATERRESTRIAL INTELLIGENCE SETI : Designed a 16 Megabyte
dynamic RAM DRAM memory board for use in a 2-million point complex FFT
spectrum analyzer.
SYMBOL STREAM COMBINER SSC : Designed digital hardware to combine
together symbol streams from several sources to increase the SNR of the
received symbols when arraying several antennas together.
Additional comments:
I am a very "hands-on" engineer and am at home working in a laboratory
environment. I am familiar with most types of test equipment o-scopes,
logic analyzers, etc. and have enjoyed designing, building, testing and
troubleshooting various electronic circuits both for work and as a life
long hobby.
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