Resume 11

ASIC-FPGA Design & Verification Engineer

To work where I am given the opportunity to assionately exploit my knowledge to the fullest level of satisfaction both personally as well as for the company I serve on the whole.

Over 7+ years of experience 5+ years of experience in Hardware Design, Development & Verification using ASIC, PLD, CPLD & FPGA Designing & Verification, Board simulation, ANSI C, Assembly, C++, PLI, PCI, VLSI, PCB, Verilog, Synopsis, VHDL,VERA, Gigabit Ethernet,(Networking) SONET,ATM, Device Drivers , Win Board, Synthesis, Verification of Design.CMOS,Embedded System (SOC),Real Time Operating System RTOS), VxWorks, Logic Analyzer, Simulator, Emulator & Programming of RAM(SRAM & DRAM) With excellent analytical and programming skills. Very conversant in documentation, presenting prototypes, client interaction, quality assurance. Good communication and interpersonal skills. Strong Points include quicker grasp to new concepts, the ability to pursue matters in great detail and able to work in a team.

Bachelor of Electrical Engineering from Bangalore University.

Jan 2000 - Present DSSABC Software, Inc., CA, USA
Feb 1998 - Nov 1999 FDD Containers Limited, London, UK
Oct 1996 - Jan 1998 RANDY ENGINEERING, Tripoli, Libya
Jul 1994 - Sep 1996 Advanced Systems & Solutions, Delhi, India

Scope of the project was to design & develop a micro controller chip for networking purpose on networking boards, which sends and receives data digitally & Supports Gigabit Ethernet on Fiber Optics.

• FPGA & ASIC design
• Wrote verilog HDL code for design.
• Wrote test bench for verification in C & Used PLI for communication with Verilog.
• Integration testing & verification.
• Functional testing & verification.

Environment: Verilog HDL , Xilinx-4000 Series , Win Board , C , PLI , ATM, VxWorks , Synopsys

The objective of this project was to design, developed the data networking boards and test benches for verification purpose of pre written functions in verilog .

• Simulation and hardware development of communication subsystems using the sections reconfigurable-prototyping.
• Design, simulate, and test digital hardware.
• Developed data networking boards, and backplanes.
• Performed the design, capture the schematics and oversee the board layout.
• Performed board simulation and signal integrity

Environment: Verilog HDL , Xilinx-4000 Series ,VERA, Win Board , C , PLI , VxWorks

FDD Containers Limited, London, UK [Feb 1998 - Nov 1999]

The purpose of the project was to design and develop micro controller chip 80188EB for controlling the motion of Mechanical Equipment Boomer there was servo motors which controls Boomer Motion.Servo Motor was controlled by the tech called DSP motioncontroll (Digital Signal Processing). The RTOS was designed & implemented on higher priority algorithm, the signals of higher priority is served earlier than a signal with lower priority. The code was written in c & inline Assembly on Host Computer.

• Design, simulate, and test.
• Programming of SRAM & DRAM.
• Writing Test Benches for Verification in verilog & C.
• Performed board simulation

Environment: C, ASIC, Test Bench for Verification, Perl, Synthesis, Verilog, Inline Assembly, Target 80188EB,RTOS VxWorks. Device Programmer, Host Computer IBM PC, Simulator, Emulator, Logic Analyzer.

The purpose of the project was to design and develop micro controller chip 8051EB for controlling heat Generation in Turbines of thermo electric Power plant. The processor controls the steam temperature. Which receives the signals from Boiler sensors. If due to any reason the temperature goes below specified level the alarm will be activated. It had the provision of printing the Time versus heat graph controlled by the processor 24/7.Programming of the RAM was done by c & inline assembly. Device programmer was used to copy the image files on the chip.

• Design, simulate, and test micro controller chip.
• Programmed SRAM & DRAM.
• Wrote verification code in verilog & C
• Performed the design, capture the schematics and oversee the board layout.
• Performed board simulation

Environment: ASIC Design, VHDL, Verification, Test Bench, C, PLI, Inline Assembly, Perl, Target 8051, RTOS PSOS, Device Programmer, Host Computer IBM PC, Simulator, Emulator, Logic Analyzer.

RANDY ENGINEERING Tripoli, Libya [Oct 96 - Jan 97]

DOS based Stand alone Database Application developed under C++ for Civil Engineers providing Menu Driven User Interface for calculating the Quantities of material required and its Costing, providing an easy access to feed the User input data. Its related Quantity and Cost will be calculated automatically with the help of in-build functions & related data Information that is also capable of modifying as per the user specifications and standards. It takes the Complete Details of a building (to be constructed) by providing an Interface and Calculates the quantity of material required with its estimated cost, as per the standards specified. It provides an easy access for modifications.

Environment: C, UNIX and MS DOS.

Smart Systems & Solutions, Delhi, India [Jul 1994 - Sep 1996]

A standalone Application developed using Visual C++ 5.0, for Microsoft Windows95 and Microsoft Windows NT, to be used as the Employees Schedule and its Related Information, in a Large Companies, Hospitals etc. Developed system allows you to get detailed Information with Graphical Representation related to an employee and its Schedule (Working and Leave Duration's Designed for a Complete year) Allows Online Modifications for Updating the Individual Schedule of an employee, and its related information. Which intern Automatically updates the related Schedules of other employees if desired.

Environment: Visual C++, MS Windows 95.

An Application Program of which the Core Part is handled using C++, and the GUI (Graphical User Interface) is handled using Visual C++ for Microsoft Windows 95 and Microsoft Windows NT. Which allows the user to maintain its File System with Security, providing File and Application Locking. With which it is possible to lock any Executable Program from being unauthorized Access, by providing Password facility.

• It is Capable of Locking Windows95 from being Loaded Unauthorized at the Boot time.
• Provides an Easy and Quick File Search.
• Provides Quick Access to file Opening and Executing.
• Provides File Viewing facility before editing the files, giving an Easy access to Editing.

Environment: Turbo C++ 3.0, Visual C++ 5.0, and MS Windows 95.

"Impress" is a standard integrated package targeted at the Printing and Advertising Companies as the major customers. It was designed and developed by Thomson Technologies, India. The product included modules such as Financial Accounting, Purchase, Sales, Inventory and Production (Studio Section & Camera Section). Was a member of the team, which designed the system? Other responsibilities included coding and testing. Developed 12 forms and various other Reports.

Environment: Visual C++, Visual Basic, MS Windows 3.1

Visa Status : H1B