Samples represents that of an actual working technical professional found on the WEB and modified to protect the privacy of these professionals. Human names, company names, colleges, software product names are intentionally made up.

 

ANALOG/MIXED SIGNAL

 

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OBJECTIVE:

Motivated and versatile Electronics Engineer specializing in analog design and Visual Basic.

Xena Electronics developed cellular products such as hands-free kits for cellular phones and Wireless Local Loop WLL .

• Designed an Automatic Test Equipment ATE stand that tested a number of ORA s products such as hands-free kits and WLL. The stand consisted of a 11X17 two layer board stuffed with numerous analog and digital circuits including a power supply and 8051 processor. The board interfaced to an I/O board inside the PC.
• Wrote and designed a self test and calibration program for the ATE, including a routine to output the same amplitude sine wave regardless of which ATE board or PC was used.
• Wrote numerous Visual Basic programs to make the ATE versatile enough to 100 test a number of products and simple enough to use that anyone could run the test stand with minimal training. The data was automatically logged into Excel for statistical analysis. Added menu driven trouble-shooting capabilities to the ATE program so that a technician with minimal training and with no schematic could repair the Unit Under Test UUT . Used ATE to down load an assembly routine into 8051 of the UUT for self-testing.
• As a Marketing Engineer, I brought a wireless headset into Ora based on magnetic induction. I read about the chip set in EDN magazine, in which ORA then purchased 100 sample units for resale, while I worked on developing the next generation design.
• In charge of MIS; setting up PCs, email accounts, and application software.
• Provided extensive technical support to sales department for RF based cellular boosters.
• Project Engineer for the Fujitsu project that consisted of an Interface Bus circuit based on the 8051 , for communication between various phones such as the Nokia 6190 and the car voice activated Fujitsu stereo units. Rewrote the code C and assembly and redesigned the Interface Bus per customer requests.
• Took over the Synacom project after the customer had given ORA a drop dead date. As an engineer, redesigned the hardware and rewrote the embedded C code. As a product manager, kept track of schedule to make sure all 300 components and materials would be in on time for board stuffing and unit assembly. As a project engineer, trained and supervised over 20 people to assemble and test the units. As the 500 units were being tested, I personally trouble shot and then directed the repair of 200 units. The result was that ORA was able to deliver all 500 units to the customer with 100 quality within the abbreviated time frame.

Smart Engineering is a leader in vision based metrology equipment.

• Modified a metrology instrument for Common Europe specification, concentrating on EMC noise reduction.
• Implemented a motion control system that would enable a platform to travel at 10 inches per second but stop in time so that the metrology stand could measure down to 0.5 microns.

Harry develops vibration, shock, and noise control products for aircraft applications.

• Short term consulting assignment to successfully import a DSP based ADSP-2101 noise reduction system into house.
• My job was to understand the hardware so I could set up the manufacturing and testing and teach the mechanical engineers the product.

Power Design is a major power conversion equipment manufacturer.

• Wrote programs to test a full line of linear and switching power supplies in a high pace environment that saw the rapid introduction of new products.
• Investigated MDA tester.

Bluff Engineering develops a broad line of motors from fractional HP to 20 HP.

• Developed the first ATE to test motors. Designed the analog interface circuits, used I/O board in the PC, used Himmelstein 488B System 6 as the Data Acquisition System, and wrote the software, resulting in a more accurate test that saved 50 test time.
• Developed a one HP dc brushless motor controller for a new product introduction. Designed the housing and designed the analog electronics to control the motor using MC33035, Hall Effects, and IGBTs. Investigated using HEXFETs.
• Redesigned an electronic control circuit for an inverter motor used in the Space Shuttle to reduce size, weight, and complexity.
• Designed or modified several other analog circuits as needed, such as a Stepper Motor Controller.

Alex developed hydraulic pumps and motors and servo valves.

I was responsible for all programming and jointly responsible with co-worker for all the electronics, designing analog servo loops and ATE to test hydraulic pumps, motors, and servo valves.

• Built the first ATE. Chose the IBM PCs and Daytronics computers, designed the analog interface cards including servo control loops , and wrote all the software. End product was an ATE stand that could perform more complex tests than previously possible, with the added bonus of having automatic shut down and data logging capabilities with data being transferred through the Ethernet to the VAX for report monitoring . Five additional stands were later built.
• Developed Electronic Control Units for both in house and for customers consisting of servo control loops composed of the position, velocity, and acceleration signals to control hydraulic servomotor based stands.
• Designed a circuit, based on LaPlace Transforms that would modulate a high voltage 400 Hz signal in order to test a lead lag circuit inside an Aircraft Generator Control Unit. This enabled the vendor, Bendix to electronically test the units by obtaining a Bode Plot using a HP3562 Dynamic Signal Analyzer.
• Used AUTOCAD to draw electronic schematics.
• Designed analog circuits as needed such as LVDT signal conditioner and Linear Power Supplies.

MBA from California Lutheran University, Thousand Oaks, CA .
Forty three semester hours of post graduate courses in electronics and computer science including C, C++, Visual Basic, Pascal, and Assembly.
BSEE from Ohio State, Columbus, OH.

Professional Engineers License in Electrical Engineering, State of California.
References are available upon request from former supervisors.
Personal Computer expert.

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Objective

Analog /Mixed-Signal Design Engineer position emphasizing design and development for deep sub-micron analog circuits, PLLs, VCOs, and mixed signal circuits.

Working as a Design engineer in the PLL Design Group, with responsibilities in PLL design, Supervision of Layout, Silicon Debug & Characterization of PLL.

• Designed a PLL for DSP Processor

  Designed a PLL for DSP processor, in 0.18um technology, working at 1.8V .The VCO output frequency range was from 300Mhz to 400MHz. The input frequency range was from 11.289MHz - 27MHz. The PLL used a current starved ring oscillator. My major responsibilities were the design and simulations of the individual PLL blocks using H-spice, closed loop simulations using AMS Antrim Mixed Simulator , stability analysis using a macro-model of PLL, and post layout simulations with extracted parasitics using Arcadia.

• Designed and Debugged a PLL for 192KHz Digital Audio Interface Receiver

  Designed PLL for Audio Applications in 0.35um technology, working at 3.0V . The VCO output frequency range was from 8Mhz to 50MHz. The input frequency range was from 8KHz - 192KHz. The PLL used a relaxation type Oscillator, PFD, charge-pump, band-gap current source, and bias current generator.

  Also designed a frequency detector for the same chip, which detects whether the input sample rate frequency is greater or lower than 96KHz. - My major responsibilities for this PLL were block level simulations using H-spice, closed loop simulations using AMS Antrim Mixed Simulator , stability analysis using macro-model of PLL, and post layout simulations. Debugged the PLL using an AP BOX, network analyzer, and Time Interval Analyzer TIA , Micro-probe station, Therostream.

• Chip-Level Simulation

  Made set-up for chip level simulation using AMS Antrim Mixed Signal Simulator . Successfully simulated Audio Receiver Chip , which includes PLL, digital logic, pads. - Major challenges were to interface between digital logic and analog blocks.

• Characterized and Debugged a PLL for 96KHz Digital Audio Interface Receiver

  Characterized the performance of a PLL over temperature and voltage. RMS Cycle-Cycle Jitter, VCO gain, Time Deviation were the major things to observe.

• Designed a PLL for Cell-Phone Applications

  Designed and characterized a PLL in silicon for a cellular phone chip in 0.13u working at 220Mhz. Designed of current reference, current-controlled oscillator, DAC and PFD. The purpose of current reference block was to provide a reference current to DAC and VCO.

• The 5 bit DAC was to generate an output current corresponding to the setting of the input bits, which in turn controlled the frequency of the VCO. Variations on the output current of current reference block due to power supply, temperature and process were very small. DAC is voltage to current converter and the output current has binary weight according to input bit. All the blocks were simulated in both SSIM and BSIM models. To know the dynamic behavior of PLL digital and analog blocks are simulated in mixed signal environment Verimix . My responsibility was to setup for interface between digital and analog blocks. Digital simulations were performed using Verilog-XL and the analog simulations were done in SPICE.

• Custom Layout & Integration of Analog blocks

  Experience in full custom layout of a current reference, DAC, and VCO for a PLL in 0.18u. Experience in floor planning and integration of analog blocks. Also checked out GDSII for TESTCHIP for process qualification. This included all analog blocks with other structures like op-amps and voltage references. Also was responsible for post layout simulations using STAR-RC for parasitic extraction.

• Topology selection for analog circuit design and design of various Op-amps Proposed and implemented a methodology for analog design automation. Circuits used to verify the proposed methodology were CMOS OTA , folded cascode OTA, and Miller compensated OTA. Depending upon knowledge base and Specifications given by the user. The tool gives first hand sized-schematic diagram from the given user specifications. The source code was written in C.

Indian Institute of Technology IIT , Kanpur, India
Masters Kanpur, UP, India
Electrical Engineering Microelectronics and VLSI Design

Regional Engineering College REC
June 1998 Bechlors Hamirpur, Himachal, India
Electronics & Communication Engineering

• SPICE.
• PowerMill Synopsis circuit simulator .
• AMS Antrim mixed signal Simulator .
• MATLAB.
• Virtuoso Cadence Layout & Schematic Editor .
• Verimix Cadence Mixed Signal Simulator .
• Avanti Hercules & Mentor Caliber DRC & LVS .
• StarRC Post Layout
• Arcadia Synopsis parasitic extraction .
• Languages - Verilog.

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Expertise

• Full-custom analog and digital layout in submicrons and bicmos technologies.
• Support and training of youngs layouters.
• Designer assistant for simulation of modified bloks.
• PCB drawing with third generation cellular phone constraints.
• Design and programmation of PCB for testing ASICs with GPIB driving on labview 5.
• VHDL auto-training for system simulation assistant .

• Re-layout of a complete FPGA for use in radiation environment.
• Layout full-custom of regulators for multiple use in multiple technologies.
• Software: Cadence, calibre, dracula and L.E.D. on Solaris workstation.

• Layout of a PCB for develop the third generation of cellular phones.
• Software: Mentor Graphics on Solaris workstation.

• Full-custom layout of mixed signal bloks in sub-micron and bicmos technologies.
• Design of PCB for testing the asics with GPIB driving on labview 5.
• VHDL auto-training for system managment.
• Software: All tools of Mentor Graphics on Solaris workstation.

• Development with Pspice 7 of an ASIC in gate array technology.

• Clean room operator in masking division week-end job .

1996 to 1997 - Technician in microelectronics equivalent to MSEE in microelectronic
1994 to 1996 - Technician in electronics equivalent to BSEE in electronic
1991 to 1994 - Electronician needed for BSEE training

Diploma delivered by the Centre de formation Professionnel du Littoral Neuch telois C.P.L.N. in Switzerland.
References available upon request

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Position Desired:

Position as an electrical engineer, with interests in ASIC design, digital and analog circuit design, and embedded software.

Iowa State University, Ames, Iowa 1991 to 1995
B.S., Electrical Engineering, December 1995
G.P.A.: 3.82/4.00

• Experience in digital circuit design, including Intel x86 and i960, ARM, and Rockwell AAMP processors;
• PCI and AMBA buses;
• serial links including Fibre Channel, Infiniband, ethernet, LVDS, RS232, and various ARINC protocols;
• SRAM and DRAM buses
• SCSI
• PLD logic design
• Analog circuit design including active analog filters, amplifiers, and power circuitry
• Experience with circuit simulation tools, including P-Spice and Saber
• C, C++, VB, Ada, Assembly, Verilog, and VHDL
• Experience with Boundary Scan JTAG
• Experience with Synopsys simulation and synthesis tools
• Schematic capture with Viewlogic and Accel

Worked on embedded SCSI controller ASIC.

• The design included integration of an ARM processor, ARC DSP, SCSI controller, and various peripherals, including interrupt controller, timers, etc.
• The ARM was the main microprocessor, communicating over an AMBA bus to the various peripherals.
• ASIC design was done in Verilog, using Synopsys tools.
• Code written in C, assembly, and Verilog to test ARM and peripheral functionality.
• Low level work done on JTAG to test In Circuit Emulator ICE functionality.

High speed 1 GHz + digital and analog design for Fibre Channel applications.

• Implementation of embedded systems.
• Systems are centralized around one or more ASIC s which implement high-speed switching of Fibre Channel data.
• The ASIC sends and receives parallel data streams through serializer/deserializers SER/DES , which serialize the data and send it to the outside world. My part includes timing and logic analysis of the ASIC to ensure proper operation with the SER/DES and other ASIC s.
• The system is managed by an embedded PC-based supervisory system. My part with this included mating the PC to on-board PCI devices and other memory and I/O devices.
• Wrote PLD "glue" logic to interface peripheral devices to the PC.
• Aided in writing and debugging software drivers for these devices.
• Perform timing analysis for all interfaces.
• Developed an in-circuit PROM programmer through a JTAG port.

• PLC logic programming and Human-Machine Interface programming.
• PLC coding to automate food, beverage, and animal feed production facilities.
• HMI programming with Wonderware to develop user-friendly interfaces to production lines and machines.
• Program Management and Field Support.

• Design of automated test equipment ATE s for commercial avionics. The ATE s were used to automate the test of commercial avionics, for factory production test and service center debug and support. Also wrote code to operate these ATE s in lab and factory environments. The code would control test instruments over GPIB, VXI, RS232, and other interfaces.

• Specialized in processor bus emulation and test. Designed processor bus interface circuit cards to connect a processor bus to an emulator. This included research into processor bus transactions and timing, digital and analog hardware design, logic design, simulation using P-Spice and Saber , board layout, and debug. Developed cards to test Intel x86, Texas Instruments DSP, Rockwell AAMP processor buses and all associated memories and peripherals.

• Did much work with Boundary Scan JTAG test development. This included writing applications in C and C++ to execute tests. These tests exercised the primary processor, PLD, and ASIC components of a board, along with direct or indirect test of other peripheral devices not directly attached to the Boundary Scan Chain.

• Analog design, including filtering and wave shaping. Also included utilizing techniques for noise control in analog and digital systems.

Alpha Sigma Phi Fraternity: Vice President and Academic Chair.
Dean s list every semester at Iowa State.
Tau Beta Pi, Eta Kappa Nu, Phi Kappa Phi, and Golden Key Honor Societies.

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OBJECTIVE:

Design/test engineer or researcher position in the area of analog, digital and mixed-signal VLSI design and test.

Sep. 1998 Present
Ph.D Student
School of Electrical Engineering and Computer Science
Ohio University, Dayton, OH, USA
GPA: 3.8/4.0
Dissertation: Analog and mixed-signal test and fault diagnosis
Expected Graduation Date: Spring or Summer 2002.

Sep.1993 Jul. 1996
M.S.
Weak Signal Detection Lab, Institute of Physics,
China Academy of Sciences,Beijing, P.R.China.
GPA: 85/100

Sep. 1989 Jul. 1993
B.E.
Department of Electrical Engineering & Automation,
Tianjin University, Tianjin, P.R.China.
GPA: 87/100

• Project: Analog and mixed-signal test and fault diagnosis
• Skills: Analog and mixed-signal test, Analog simulation, VHDL design, VLSI CMOSdesign and test.

• Project: Testing strategies for mixed-signal systems with embedded software
• Skills: Analog and mixed-signal test, analog simulation, data acquisition by GPIB and Labview.

• Responsible for designing and constructing the STS2106A MS/LS Digital IC Test System.
• Skills:
  • Board-level analog and mixed-signal design, layout, debug, test.
  • Digital design with EPLD devices, digital IC Test.
  • Digital ATE maintenance as application engineer.

• Project "The design and construction of part of ECS for low temperature scanning tunneling microscope", supported by China National Science Foundation.
• Skills: Low-noise analog design, layout and test, pre-amplifier design, feedback control design.

• Project: An algorithm for the computation of power analysis in power systems by Fortran77

1989 Tianjin University Distinguished New Student Award.
Tianjin University Outstanding Student Scholarships in 1990, 1991, 1992.
1996 Institute of Physics Outstanding Graduate Students Award Nominee.
2002 Ohio University Outstanding Graduate Student Award Nominee in process .

• 4+ year experiences in board-level digital, analog and mixed-signal design including 2-year industrial experience.
• 2 year industrial experiences in digital IC test;
• 2 year experiences in low-noise analog design and feedback control design.
• 4+ year experiences in schematics, synthesis, simulation, test, place & route, verification.
• 4 year experiences in analog and mixed-signal test and fault diagnosis;
• Excellent writing communication skills and team-work ability.

• Languages: C/C++, Fortran, Assembly Language, Basic, JAVA, Matlab, Labview, VHDL;
• Hardware Debug: Logic analyzer, Oscilloscope.
• Circuit Schematic Tools: OrCAD, Tango, Protel, CADSTAR;
• Analog Simulation Tools: Spice, Saber.
• VHDL design by Active-VHDL and implemented by XILINX FPGA.
• Digital design by ALTERA Max+Plus II and implemented by MAX7000 EPLD devices.
• VLSI transistor-level CMOS Design and Test by Mentor Graphics: Design Architect, QuickSim, ICStation, Lsim, AccuSim, AutoLogic, Leonardo, BISTA, ATPG, AutoLogic II, QuickFault, QuickGrade, QuickSim, QuickPath.

Brendan Harrison, Kang Qinghong, Carl Webster and Bryan Barrett, Nonrandom quantization errors in timebases, IEEE Transactions on Instrumentation and Measurement, vol. 50, pp. 888-892, 2001.

Kang Qinghong, Carl Webster, "A generalized fault diagnosis in dynamic analogue circuits," International Journal of Circuit Theory and Applications, vol.30, no.4, 2002.

Carl Webster, Kang Qinghong, Zhi-Hong Liu and Jerzy Rutkowski, Entropy-based optimum test points selection for analog fault dictionary techniques, submitted to IEEE Transactions on Instrumentation and Measurement.

Carl Webster and Kang Qinghong, Generalized decomposition method by multiple-measurement and multiple-frequency for analog fault diagnosis, submitted to IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications.

1. Brendan Harrison, Kang Qinghong, Carl Webster and Bryan Barrett, "A new method to compensate quantized time-base nonlinearity of sampling instruments," Workshop on Software Embedded Systems Testing, National Institute of Standards and Technology, Gaithersburg, MD, Nov. 1999.

2. Brendan Harrison, Kang Qinghong, Carl Webster and Bryan Barrett, Nonrandom quantization errors in timebases, Proceedings of the 17th IEEE Instrumentation and Measurement Technology Conference, vol. 1, pp. 235-240, Baltimore, MD, May 2000.

3. Carl Webster and Kang Qinghong, "A method for multiple fault diagnosis in analog circuits," Proceedings of the 33rd Southeastern Symposium on System Theory, pp. 65-68, Dayton, OH, Mar. 2001.

4. Carl Webster and Kang Qinghong, Multiple-fault diagnosis of analog circuits by locating ambiguity groups of test equation, Proceedings of the IEEE International Symposium of Circuits and Systems, vol. 5, pp. 199-202, Sydney, Australia, May 2001.

5. Carl Webster and Kang Qinghong, "A new approach to multiple fault diagnosis in linear analog circuits," Proceeding of the 7th IEEE International Mixed Signal Testing Workshop, Atlanta, GA, Jun. 2001.

6. Carl Webster and Kang Qinghong, Multiple fault diagnosis of analog circuits based on large change sensitivity analysis," the Proceedings of the 15th European Conference on Circuit Theory and Design, Espoo, Finland. Aug. 2001.

7. Carl Webster and Kang Qinghong, A decomposition method for analog fault location," accepted by the IEEE International Symposium of Circuits and Systems, Scottsdale, Arizona, USA, May 2002.

8. Carl Webster and Kang Qinghong, Locating stuck faults in analog circuits," accepted by the IEEE International Symposium of Circuits and Systems, Scottsdale, Arizona, USA, May 2002.

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OBJECTIVE:

Engineering and Design of Analog and Digital Electronics, Controls and Embedded Systems

Contract engineering and consulting services for the electronics industry. Objective area includes, but is not limited to, the Northeastern United States (CT, N-DE, MA, NE-MD, NJ, NY, PA, RI). Scope involves all phases of engineering, development and design of analog and digital electronic equipment, controls and embedded systems for industrial and commercial applications.

Responsible for Product Development, Consulting and System Engineering of electronic hardware and microprocessor or microcontroller based controls and systems for various clients.

This section has been prepared to illustrate capability and expertise in providing solutions for a wide range of applications. These highlights are a sample of typical projects. Due to the proprietary nature of imaging and other applications, and to space limitations, not all achievements have been included within this listing but can be demonstrated upon request.

• Designed a microprocessor based custom controller for a compression testing machine for the package testing industry. The system contained high speed digital and sensitive analog circuitry on a common printed circuit board. Analog sensing ranges were greater than 90db (1 bit = 1.6uv from strain gauge input). System included automatic calibration, range switching and x-y recorder output gain switching for force and displacement transducers. Operator input and feedback was from a custom membrane switch and display panel. Project included circuit and software design, printed circuit board design, enclosure packaging, front panel design, machine control interface and documentation.

• Developed custom software for a disciplined oscillator for the communications industry. System had to capture T1 and LORAN inputs, extract the reference using digital signal processing, mathematically derive the source standard and control a local ovenized oscillator. System had to manage and maintain up to four input references, perform switching upon qualification failure and manage aberrations such as phase jumps and intermittent inputs. The system would automatically configure according to the input and output cards present at startup and system operating parameters could be set and monitored from an operator input terminal.

• Designed development prototypes and various other multi-channel DSP based DSL modems for the communications industry. Involved design of I/O from ATM Utopia to DSP data pump, PLDs (programmable logic devices), AFE (analog front end) D/A I/O section, line drivers and telecom interface. Units operated in SDSL and ADSL modes.

• Re-designed controllers for a locomotive braking control system to improve system performance, noise immunity and reliability. Implemented mixed signal ground management to increase SNR of A/D conversion sections. System utilized 3150 Neuron network microcontrollers.

• Developed a microcontroller based telephone wiretap controller for the criminal surveillance industry, implementing an 8051 based architecture. Involved detecting and decoding telephone control signals, target and surveillance line isolation, data packing, protocol development, data encryption-decryption, communications and control from a remote database computer. Design had to meet FCC Part 68, be compatible with telephone line powering and include battery standby circuitry for remote pole mounted operation. Conceptualized and supervised firmware development with client personnel.

• Designed a 68HC05 based remote alarm controller for the security industry. Involved monitoring and control of switching supply, battery backup, output loads, terminators, wired and serial data link input commands. (UL)

• Developed and packaged a custom Industrial Panel Display for a NEMA 12 environment to convert and display inputs from a programmable controller.

• Designed a board level microprocessor control for a Breath Alcohol Analyzer incorporating a 6809 processor. System required non-volatile RAM, instrument I/O, communications and a printer driver.

• Microprocessor/controller architectures that may not have been mentioned in previous paragraphs but have been employed in designs include: Intel 80x51, 8085, 80x86, 8088&188, Motorola 680x, 680x0, 68HC05 series, NEC 1800 series and Microchip PIC series.

• Designed and developed a digital laser scanning system controller for the motion picture industry. System captured image data from a database computer over a parallel ECL interface, frame synchronized the data with laser scan circuitry and modulated the laser. Included provisions to adjust frame position from the start of scan and control the sequence of peripheral subsystems.

• Developed a high speed Memory System for entire MOD 300 board level distributed control product line. Involved interfacing 8206 Error Detection and Correction Unit and 8207 Advanced Dynamic RAM Controller with 68000 Microprocessor. System used 256K bit DRAM chips and included circuitry to enable full test under software control. The entire design effort was from preliminary data as actual memory and control circuit components were newly developed and unavailable at the time(1983).

• Designed a retrofit circuit to add separately adjustable bi-directional acceleration and deceleration ramps to an existing control circuit. Reference control was for a four quadrant regenerative drive for a warehouse stacking control system. Circuit had to detect reference going through zero to select appropriate ramp. Design was implemented by swapping existing board with custom designed board.

• Developed a high speed addressable Parallel Bus Interface to operate with twelve peripherals over forty feet of ribbon-cable. Bus was for redundant communications in the MOD 300 distributed control system (1985).

• Designed and developed a power monitoring and regulation control for the utility industry. System would monitor voltage and current on each side of a distribution transformer and control tap changes according to load and line conditions. Analog section required precision circuitry to maintain amplitude, linearity and phase accuracy from fundamental to the 31st harmonic. Included anti-aliasing circuitry for low sample rate signal processing, A/D and digital control logic. System had to meet surge, transient, oscillatory, voltage withstand and EMI susceptibility testing per IEEE C37.90 and C57.15. Entire system had to be electrically isolated from all I/O, database communications, and operate from -40 to 85C.

• Designed and packaged an A.C. power and heater control for a Wafer Washing Machine. Consideration had to be given to cross-talk between heaters, D.C. motor controls and computer equipment. Environment included deionized water and clean room conditions.

• Designed a computer control interface for an industrial pulsed laser power supply. Involved custom designed hardware interfaces to existing circuitry and control of optics implementing Multibus and C language programming. System was for an X-ray Lithography Stepper for the semiconductor industry.

• Designed and supervised construction of Slitter Control System. System interfaced and controlled D.C. motor controls, ultrasonic cleaners, laser bar code readers and printers, edge guides, tension controls, densitometers and a board level microprocessor based data collection system.

• Developed a microprocessor based Control System to replace IBM 72/73 AMA tape reader and interface with PDP 11/37 computer. Involved custom circuit design of optically isolated reader control and data interface, front operator panel, microprocessor bus and control interface, error checking, sequence checking, operator front panel interface, database communications and protocol development, packaging, software development and documentation. Firmware was developed in assembly language.

• Designed and packaged a CRT Test Stand. Involved computer and manual control of high voltage power supplies and low level metering equipment over IEEE488 bus and software development. Also involved custom circuit design and packaging of high voltage switching and interconnections, video drivers, deflection control and measurement, high voltage flashover protection, personnel safety interrupts and integrating various support equipment such as scanners, video generators, etc.

• Installed an iAPX286/10 based Intel System 310 with MULTIBUS and iLBX bus extension. Involved modification of multiuser, multitasking operating system, communications and networking, C language programming and user interface programming (1982).

• Consulting engineer to make recommendations for design and fabrication of an Advanced Prototype Belt Fabrication Machine. Involved microprocessor control of various process steps and linear positioning systems.

• Consulting engineer for a mass transit application. Client was having catastrophic field failures of an existing design due to high voltage transients in a passenger railway car control system and unable to determine the cause. Correlated failure data with circuit design review and determined component of probable cause. Customer service engineers at remote field site verified failed component was as proposed.

• Consulting engineer for a Coating Line at Oklahoma City facility. Involved application engineering various process controls including D.C. motor controls, laser inspection equipment, ultrasonic cleaners, programmable controllers and microcomputer distributed control systems. Electricals had to be in accordance with hazardous atmospheres. Worked closely with machine manufacturer.

• Consulting engineer for a Pilot Plant installation involving hazardous locations. Specified and supervised installation of vapor detectors, alarms and TLV monitors.

• Consultant to evaluate laser and circuit noise problems for a prototype protein digital storage device control system. Involved acquiring various waveforms, measurements, evaluating data and making design recommendations for photo-detector circuit, system signal routing and packaging.

• Consulting engineer to investigate intermittent failures in the memory portion of a distributed control system product. Reviewed system logic and performed a thorough timing analysis. Modified existing programmable logic terms to resolve a timing conflict that could be easily implemented on current field units and subsequent production systems.

• Imaging and Video:
  • Discrete Analog and Digital
  • Embedded Systems (board level, computer based )
• Instrumentation and Test:
  • Embedded Systems (µP and µC based, computer based )
• Communications, Telecom:
  • Embedded Systems (µP and µC based, board level)
• Transportation Industry:
  • Embedded Systems, µP and µC based
  • Consulting Services
• Signal Processing:
  • Discrete Analog and Digital
  • Embedded Systems, µP and µC based
• Industrial Control:
  • Discrete Analog and Digital
  • Embedded Systems (µP and µC based, board level)
  • Consulting Services
• Utility Industry:
  • Discrete Analog and Digital
  • Embedded Systems, board level
• Surveillance, Security:
  • Embedded Systems, µP and µC based

• Had entire project responsibility for developing an integral horsepower, 3-phase, variable frequency, A.C. motor control.
• Involved development, testing, debugging and packaging of high power A.C. and D.C. switching regulator supplies, digital waveform generators, analog and digital control circuitry, power supply design, V/F and F/V converters, heat sink design and packaging.
• Worked out packaging and initial printed circuit layout for PCB designers.
• Provided liaison with outside contractors and vendors.

• Involved on-site application engineering, system engineering, test and initial start-up of industrial process control systems including SCR and PWM regenerative D.C. motor controls, eddy-current drives, digital control equipment, process controls, D.C. stepper drives and programmable controllers.
• Combined the attributes of application engineer, sales representative and field engineer.

Involved on-site application engineering of industrial process control equipment.

• 2/71 - 1/73
  Responsible for application engineering, system quotations and sales for ten representative areas in Northeast United States dealing with industrial control systems.
• 9/69 - 2/71
  Responsible for field service engineers and over-the-phone troubleshooting for customers over the entire United States. Instituted and instructed customer product training school. Provided engineering support and field service start-up of industrial control systems involving SCR D.C. motor controls, eddy-current drives and related equipment.

Inertial guidance and aircraft landing systems test engineer. (Required security clearance)

University of California at San Diego, 1967, Electrical Engineering (NESEP).

U.S. Navy, "A" and "B" School, Aviation Electronics. Specialized in airborne communications and navigation equipment. (Required security clearance)

Attended, on a regular basis throughout the past 30 years, workshops and seminars in microprocessor design implementation techniques and various manufacturers equipment seminars. Currently taking review courses in preparation for P.E. Exam.

Ability to quickly absorb customer's needs and develop a solution, implement the most expedient method of engineering and design for the application and positively motivate personnel to accomplish tasks.

Member: IEEE, SBE, AES

Avocation: Photography
Interests: High-end Audio, Video and Tourism

Having over thirty years experience in the engineering, development and design of analog and digital electronic equipment, controls, embedded systems and software, and having dealt with a wide range of applications offers a significant contribution to the success of client projects.

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Objective

An opportunity to enhance the success of a quality high technology company by providing technical and other contributions such as design and problem solving capability.

• Digital, Analog, and RF Circuit & System Design
• Wireless and Wireline Telecommunications
• UNIX, LINUX, DOS, Windows
• Java, C/C++, BASIC, FORTRAN, HTML
• TCP/IP Network Programming
• Database Structures & Programming
• Cadence, Mentor Graphics, OrCAD, ViewLogic, AutoCAD
• FPGA Design in Verilog, VHDL
• T1, E1, SONET, ATM, ISDN, SS7

• Providing hardware and software technical consulting services to commercial clients in a wide variety of industries and technologies.
• Created system level design for major automotive electronics manufacturer of an embedded controller based automotive energy management system.
• Provided expertise in analog circuits by performing PSPICE simulation and analysis in support of the development of a Lithium Polymer battery management system.
• Created system level design of device to adapt single mode Resilient Packet Ring optical ethernet system to operate as a multiple ring CWDM system.
• Designed high speed digital hardware for a 2.5Gbps interface control plug-in module for a DWDM combination SONET & IP optical networking system.
• Created system level design of DSP based jitter/wander plug-in module for a portable digital transmission test set.
• Created Java test software for porting verification/debugging of embedded Java virtual machine to an embedded Linux platform.

• Designed OC-3 SONET/ATM interface module capable of long, medium, and short reach single-mode and multi-mode for a fiber optic multiplexer/access system.
• Used knowledge of high frequency design/RF/Analog techniques to integrate 155 MBps optical modules with ASIC s.
• Designed programmable logic for Altera and Vantis FPGA s, using Verilog.
• Provided design support to other design projects that were behind schedule, and brought them up to date.
• These included a DS-1 tributary interface module, high frequency signal analysis and verification of back plane design, specialized test hardware, and a PowerPC based system control module.

• Designed system architecture and hardware for T1 and E1 transmission network echo cancellers used in IXC, Cellular, PCS and Satellite environments.
• The new design incorporated a cluster controller to allow intelligent network management and compatibility with SS7 call set-up.
• General purpose DSP s Motorola 56302 allowed flexibility to upgrade echo cancellation and audio processing algorithms.

• Conceived of and designed FITL Drop Test Unit using A/D and D/A conversion and a 68HC11 micro-controller, to reduce cost, space requirements, and power consumption over previous analog design.
• Designed FPGA to adapt T1/SLC96 DLC system to support Motorola Cablecomm/TCI coaxial cable-TV PCS field trial.
• Served as technical liaison between several departments in specifying and coordinating systems requirements for a high capacity FITL Optical Network Unit offering a wide variety of communications services.
• Recommended adapting and marketing FITL and DLC systems for use in PCS networks.
• Training in ViewLogic.

• Integrated T1/E1 operability into the original analog Unipage paging terminal by designing T1 and E1 digital trunk interface sub-system and modifying the backplane and analog trunk interface cards.
• Also, designed a system alarm panel and other hardware for Unipage terminals.
• Conceived of and proposed new architecture for next generation wireless terminal, which would provide traditional radio paging services, but also allow migration toward PCS and two-way paging.
• This architecture provided greater flexibility to development of new services, as well as compatibility with existing hardware and software.
• As the company specialized in quickly providing custom tailored solutions, this architecture emphasized flexibility by using generic hardware, which could perform multiple functions through software.
• A uniform backplane design allowed any card to be positioned anywhere within a shelf and provide fault protection through redundancy.
• Depending upon the software load, a generic DSP card would perform multiple functions such as DTMF, MFR1, or MFR2 tone detection/generation, voice encoding/compression for voice mail storage and voice paging transmissions, or future applications.
• A generic digital telco interface could be provisioned to operate as a T1, E1, or ISDN Pri interface.
• A generic analog telco interface could be provisioned to operate with commonly used 2-wire or 4-wire special services or POTS lines.
• Generic hardware would also have the advantage of reduced inventory burden.

Bachelor of Science Electrical Engineering Texas A&M University, 1987 - 1991

• Electromagnetic Theory
• Applied Electromagnetics
• Microwave RF Circuits & System Design
• Analog Digital Communications Theory
• Digital Signal Processing
• Digital Analog Circuit Design
• C Language Programming

• Digital Voice Telephony Link
• Infrared Pulse Train Detector/Decoder
• Log Periodic Array Wideband Directional Antenna
• Computer Modeling for Microstrip Filters
• 2.4 GHz Micro-strip Bandpass Filter

Up

OBJECTIVE:

Director of engineering in electronics firm.

• A proven technical manager with an excellent educational background.
• Experienced in a wide range of electronic fields including telecommunications, microwaves, data acquisition, technical support, and international regulatory approvals.
• A leader and team builder who communicates effectively.
• Special experience includes:
  • Engineering management of both R&D and support organizations
  • Extensive analog electronic design experience

Management

• Managed the R&D and technical support groups at a manufacturer of PC based data acquisition and industrial control systems. Staffed the department, made budgets and schedules. As part of the executive team, helped decide company direction on new products, partnerships, policies, and finances.

• Managed a diverse engineering support group with responsibilities for hardware design, computer platform selection, production engineering support, engineering change control, SNMP remote diagnostics, SMS software deployment and one-off product development. Responsible for budgets and staffing.

• Managed the development of a parallel port data acquisition unit, windows application software, networked data acquisition node, plus several smaller products. These products soon became the leading source of revenue for the company.

• Introduced computerized call tracking to a technical support group for data acquisition systems, reducing the average response time to customer calls by a factor of four.

Engineering

• Gained international telephony, safety and electrical regulatory approvals UL, CSA, FCC, CE, BABT, etc for autodialing telephony systems in more than 30 countries in North America, South America, Europe and the Pacific Rim.

• Successfully implemented the logistical module and variant configuration of SAP software as new company wide ERP system in six months.

• Redesigned and prepared for production a four-port voicemail system based on an embedded 386 microprocessor while reducing product costs by 40 .

• Designed 300-400W off line switching power supplies, drive circuitry for a high-resolution color CRT display, and a high performance graphics card for a network scalar analyzer.

• Brought 4 port voicemail system with 386 embedded processor, flash memory system and DSP into production.

• Designed, tested, simulated, and did worst case analysis of high reliability switching and linear power supplies for a new line of large communication satellites.

• Developed the power system for super-mini computer which included several current sharing power supplies and the power distribution system. Specified, procured, and set up an automatic test system for 2 million/year of OEM power supplies.

Greenberg Consultants, Macon, GA 1/00 - present
ELECTRICAL ENGINEERING CONSULTANT

Melissa International Technologies, Atlanta, GA 11/95 - 10/99
MANAGER OF DEPLOYMENT ENGINEERING

Apple Tree, Inc., Sacramento, CA 3/91 - 10/95
DIRECTOR OF ENGINEERING

Safe Microwaves, Inc., Sacramento, CA 2/86 - 2/91
PROJECT LEADER

Xtron Systems, Inc., San Diego, CA 11/83 - 1/86
ENGINEER

Epkot Aircraft Co., San Jose, CA 6/81 - 10/83
MEMBER OF TECHNICAL STAFF

SAP, SPICE, Microcap, Orcad, ABEL, VHDL, Autocad Lite, MathCad, FileMaker Pro, Basic, DOS, Windows, Microsoft Office including Word, Excel, Project, Access and PowerPoint.

Mastering Management, Santa Clara University
Approvals Liaison Engineer, British Approvals Board for Telecommunications
Member Technology Association of Georgia

Masters of Business Administration - Emory University, Atlanta, GA - graduation May 2002
Master of Science, Electrical Engineering - University of California Los Angeles
Bachelor of Science, with honors, Engineering - California Institute of Technology, Pasadena, CA
Co-Valedictorian - Paso Robles High School, Paso Robles CA

Up

OBJECTIVE

RF/Optical/High-Speed-Analog Engineering position requiring high-frequency/low-noise/broadband hardware design and/or RF system level definition

Master of Science in Electrical Engineering/Minor in Mathematics, Washington State University WSU , August 1993, Grade Point Average GPA 3.89 of 4.0, Specialized in Electromagnetics and Semiconductor Theory
Bachelor of Science in Electrical Engineering, WSU December 1989, GPA 3.56 of 4.0, Cum Laude, Four "Presidential Honors" for high GPA levels

• Responsible for design of transmitters/receivers ranging in data rates from 125 Mb/s to 2.5 Gb/s.

• Data channel receivers utilized InGaAs Indium Gallium Arsenide and silicon APD s Avalanche Photo Diodes with sensitivities in the range of -48 dBm for 125 Mb/s data and -38 dBm for 1.25 Gb/s data optical power levels .

• APD receivers required high voltage circuit design 60 volts for 1550 nm to 200 volts for 800 nm with temperature compensation.

• Another low frequency receiver design utilized a germanium "quad" cell for purposes of tracking and alignment of the system optical transceiver heads; this design utilized an extremely low noise amplifier chain with AGC Automatic Gain Control .

• Transmitter designs utilized Fujitsu/Agere DFB Distributed Feedback lasers in butterfly package feeding an EDFA Erbium Doped Fiber Amplifier amplifier.

• Filed a patent application entitled "Switched Optical Detector Tracking For Wireless Optical Communication Systems".

• High power 200 mW s laser driver design for OC-3 155 Mb/s utilized an Infineon fiber-coupled laser, three stages of amplification NEC NE46134 s and PolyFet P123 high current stage , and a PIN diode attenuator Agilent HSMP-3814 PIN diodes ; was able to achieve less than 1 ns rise/fall times with a 500 milliamp swing.

• Agilent 86130A BERT Bit Error Rate Tester and Agilent 86100A [sampling scope with O/E Optical/Electrical and differential TDR Time Domain Reflectometer sub-modules] formed the heart of my test bench along with Agilent spectrum analyzer and 8753E network analyzer.

• Agilent ADS Advanced Design System simulation software was utilized extensively throughout employment with Terabeam.

• Responsible for next generation 2.5 Gigabit/s data rate, 100 picosecond rise/fall times fiber optic transceiver development utilizing VCSEL Vertical Cavity Surface Emitting Laser multimode, 850 nm wavelength transmitter, high frequency optoelectric PIN diode receiver assemblies, 2.5 Gb/s GaAs Serializer/Deserializer chips.

• Project involves extensive use of the following software/hardware tools: Agilent ADS software, high frequency SPICE simulations, PADS schematic/PCB layout software, Hewlett Packard 3.2 Gigabit/s jitter analysis system including BERT Bit Error Rate Tester , Agilent 83480 high speed sampling scope 20 GHz front end bandwidth with 83487A 2.8 GHz optical/electrical converter plug-in and HP54751A TDR plug-in, Advantest optical power meter, JDS Fitel optical attenuator.

• Eye diagram analysis, BER analysis 10e-12 BER goal , jitter analysis are the mainstay performance indicators.

• Also, high speed 3.2 Gb/s, 100 picosecond rise/fall times backplane design for high port-count Fibre Channel switch.

• Backplane design requires:

  1. extensive modeling of vias, couplers, connectors, transmission line geometries with HFSS High Frequency Structure Simulator software from both Ansoft version 7.0 and Agilent version 5.5
  2. high frequency SPICE-like simulations using Agilent ADS software
  3. evaluation of high speed connectors from Teradyne VHDM and HSD , AMP HS3 , Siemens SpeedPac , FCI/Berg Metral .

Involved with "skunkworks" GSM Smart Antenna system effort. Project included travel to the U.K. for training/consulting time with a GSM organization called MAC Multiple Access Communications . Responsible for system RX and TX RF Hardware development including the following:

• RX side RF switch matrix four RF inputs and 12 RF outputs with drop-in, all surface-mount RF components M/A Com LNA s, Alpha splitters/digital attenuators/GaAs switches for operation in either the EGSM, DCS-1800, or PCS-1900 frequency bands. Design included the following: an Altera EPF10K20 programmable logic device for control of all switching functions in accordance with the GSM TDMA format, a pilot tone and RF detector circuitry for path integrity checks, digital attenuators on all RF paths for path gain balance to within 0.5 dB. The entire receive side noise figure, gain, and intercept point were set by this design. 12 layer FR-4 PCB.

• "uplink" scan receiver essentially a "narrowband, IF-digitized" digital receiver with drop-in RF components for all three frequency bands mentioned above. The receiver chain consists of a single down-convert to a 200 kHz BW SAW filter center frequency of 199 MHz and then into a high speed A-to-D converter Analog Devices AD6600, encode rate = 13MHz . After the AD6600 was an Analog Devices "decimating receiver" AD6620 . The AD6620 contains a numerically controlled oscillator, which performs a second down-conversion, and then three stages of digital filtering at base-band for extreme rejection of GSM "blocker" signals. The design also included PLL design centered around the National Semiconductor LMX2320 synthesizer chip and a M/A Com VCO for good phase noise performance. 8 layer FR-4 construction. ETSI GSM 5.05 specification guiding design.

• "downlink" scan receiver design for monitoring communications from the TX ports of the GSM base station transceivers. Essentially the design mimics a mobile phone by utilizing half of the Analog Devices GSM chip set ADmsp415 chip set . Design included the National Semiconductor LMX2331A dual synthesizer chip, Analog Devices AD6459 IF subsystem chip mixer, amplifier, I and Q demodulators, etc. , and an Analog Devices AD6421 chip half of the ADmsp415 chip set . This design provided GSM timing and control channel information to the "downlink processor board" of our system.

• TX combiner board. This board s function is to combine four 40 watt RF signals 925-960 MHz from GSM base station TX ports. Very simple from a schematic standpoint but more difficult from a heat dissipation and mechanical standpoint. The board utilized Anaren 3 dB Xingers and 6 dB couplers, RF Power Components, Inc. 100 watt and 150 watt "waste" loads, Rogers 4350 low loss dielectric substrate, AMP 2mm Hard Metric style backplane connectors and a massive heat sink approximately 10" by 16" for heat dissipation from the "waste" loads. Single layer microstrip construction. Worked with Mechanical Engineers to define heatsink.

• TX side switch matrix and high power attenuator project 925 to 960 MHz . This design built upon previously developed prototypes and utilized two versions of M/A Com high power PIN diodes for transmission/attenuation of up to 40 watt RF signals. The design consisted of two SP5T single pole five throw switches and two high power attenuators DAC voltage control , controlled by an Altera EPM7256A programmable logic device. The SP5T s were very frequency sensitive, requiring l/2 and l/4 sections and judiciously placed tuning stubs for tuning out diode and other surface mount component parasitics. Design also required a switching power supply, centered around Linear Technologies "ultra-quiet" LT1533 chip, to go from +24 VDC to -75 VDC for high reverse bias of PIN diodes. Measurements were made on a prototype, RF modelling was performed using Ansoft Serenade software and schematic entry was completed. Layout for this design was to begin in April.

RF Engineer developing Metawave s "Spotlight" Analog Smart Antenna product for the AMPS/NAMPS cellular bands. Designs included the following:

• receive-side RF switch matrix 12 RF in s/16 RF out s, 824-849 MHz . Several splitter/LNA/attenuator/GaAs switch sections to preserve system noise figure, gain, and IP3 of the entire RX RF chain of the "Spotlight" Smart Antenna product. 12 layer FR-4 PCB.

• transmit-side RF switch matrix 869-894 MHz . Three stages of M/A Com RF digital attenuators on each path for accurate control of transmit side power levels. 12 layer FR-4 construction. 1 watt input levels. 12 RF in s and 16 RF out s. Berg style RF connectors.

• AMPS/NAMPS RF "scan" receiver 824-849 MHz, dual down-conversion design consisting of Triquint front end LNA/mixer, Philips SA625 IF subsystem chip, TOKO SAW filter at IF, and Philips SA7025 fractional-N synthesizer. Met IS-95 specifications for RF performance adjacent/alternate channel rejection performance, intermodulation performance, sensitivity performance, etc. . < 2ms RSSI scanning capability.

International Sensor Technology is a small, family-owned business originating from PhD s Laser-Heated Thermoluminescent Dosimetery LHTLD patent; Naval contract to deliver ship and shore radiation badge "readers":

• The system used SYNRAD CO2 lasers to locally heat an irradiated phosphor personnel dosimeter ; the heated phosphor would emit photons with photon density proportional to the radiation level; a high voltage photomultiplier tube gathered the photons and translated them into electronic pulses for dosimeter dosage measurement

• I was responsible for electronic debug, calibration, troubleshooting, and accuracy testing of both ship and shore systems

• This position required grading course-work/exams, supervising laboratory experiments, giving course lectures, research in non-linear MOSFET characteristics, one-on-one tutoring of students in courses covering Electromagnetics, Control Theory, Digital circuits.

• The position was with the Electrical Engineering Department and covered educational costs associated with my Master s degree as well as providing a salary.

• Worked in the Acoustics Division of NUWES for first year. Lead Engineer on the Noise Reduction System 4 NRS4 which was responsible for gathering torpedo acoustic signatures. The system incorporated "hydrophones" underwater transducers and all of the on-ship electronics to record torpedo acoustic data. Responsibilities included system calibration, recording torpedo "shots" on the Dabob range and the Canadian Quinault range, troubleshooting, system and system documentation upkeep

• Worked in the Heavy Weapons Division for last six months. Duties included Torpedo cable manufacture, cable repair, cable damage investigation, and automated cable test set development.

• Started at GS-7 ranking and obtained GS-11 ranking within 1.5 years. Duties required "Secret" security clearance level

Assisted Senior Engineers with various projects, incorporated schematic revisions, put together project instructions to be issued to technicians, estimated cost of materials for two fairly large projects, monitoring of transformer current and voltage levels throughout Boeing complex, put together plans for installation of 60 Hz power.

• Anritsu 3.2 Gb/s BERT Bit Error Rate Tester
• HP 3.2 Gb/s Jitter Analysis system
• HP8510/HP8753E/HP8714 vector network analyzers
• Rohde & Schwarz FSEB20 spectrum analyzer with low phase noise option and vector analysis option for demodulation of GMSK signal, eye diagrams, constellations, etc.
• HPE4419B dual power meter
• HP frequency and modulation domain analyzer for testing PLL step response
• HP8595E spectrum analyzer with noise figure/phase noise personality cards
• HP8644B ultra pure signal generator phase noise = -136 dBc/Hz @ 20 kHz offset
• used for GSM "blocker" testing of "uplink" receiver
• Fluke 6060 and HP8657B series signal generators
• 20 GHz Tektronix TDR Time Domain Reflectometer
• HP8921/IFR communications test sets for AMP/NAMPS receiver performance measurements
• HP portable Logic Analyzer for PLD troubleshooting.

• Ansoft Serenade version 7.5 full linear and nonlinear RF analysis
• Ansoft HFSS HFSS=High Frequency Structure Simulator
• finite element method 3-D electromagnetic solver for analysis of via structures in multi-layer PCB s and stripline/microstrip propagation
• Agilent ADS with "Momentum" Planar Field Solver
• Agilent HFSS version 5.5
• HP Series IV Omnisys for system level RF gain, noise figure, and IP3 budgets
• MMICAD linear RF simulator
• MATLAB
• Protel 99 for schematic entry and PCB layout
• Orcad schematic entry
• PADS schematic/layout
• EZNEC antenna analysis Method Of Moments software
• Microsim PSPICE for digital simulations and low frequency VCO design
• Altera MAX+II design tools for PLD Programmable Logic Device design.

• LPKF PCB milling machine training for their C60 style milling machine 4 mil traces/4 mil spacing , CTIA trade show, DesignCon 2000, Ansoft Eminence HFSS 4 day training course
• Ansoft Serenade version 8.0 training course
• HP Series IV Omnisys RF systems analysis 4 day training course
• Les Besser RF Techniques II
• 5 day GSM training course\consultation held in South Hampton, England.

Used experimental data to solve for the electric/magnetic constitutive parameters of many materials including a sample of carbon-fiber impregnated material used on the Boeing 777 aircraft. The project required the use of a HP 8510 network analyzer in the X-band and iterative Newton-Raphson techniques to solve for the variables of the "reflection/transmission" technique found in the literature.

• Modeling of electron velocity and electron scattering processes in GaAs. The GaAs model assumed multiple valleys E-k plot and covered inter- and intra-valley scattering processes involving phonon/photon and other particle collision effects. Fortran coding required sparse matrix techniques, tri-diagonal solvers, scattering process PDF characterization, Monte Carlo simulation and a CRAY computer account. Velocity vs. E-field results from the model closely matched literature results.

• charge transport in silicon model required discretizing continuity equation, Poisson s equation, and other differential equations on a "mesh"; used Fortran language and sparse matrix techniques.

• Attended every Electromagnetics courses which WSU had to offer. Topics covered include: diffraction mathematics, microwave/atmospheric propagation, waveguide analysis, optics holography and 2D spatial Fourier transforms , fiber-optic mode solutions, Near/Far field antenna analysis, solving for diffraction fields from knife-edge, solving for radar cross sections of canonical geometries, use of iterative techniques for solving electromagnetic problems, complex variable mapping.

• VLSI Course VLSI chip design 2 mm process, 1989 using Mentor Graphics software, SPICE modeling, and very dense D Flip-Flop architecture. VLSI chip function was "pattern-recognition" of a digital vector.

• Microwave amplifier and filter design designed with Touchstone and microstrip; hands-on in WSU s Microwave laboratory.

• Fabricated simple Schottky diodes in WSU s "clean" room as part of graduate-level semiconductor course.

Up

OBJECTIVE:

A challenging position in analog/mixed signal design and/or systems engineering.

Electrical engineering professional with broad-based experience in design, manufacturing and test. Proven abilities to design discrete circuit cards, troubleshoot electrical and computer problems and organize test data, detailed failure mode and effects analysis. Specific knowledge includes:

• MIL-C-23200 design specification for shipboard platforms.
• ORCAD - PSPICE schematic capture detailed analysis tool.
• Computer Vision FUTURENET schematic capture tool.
• MATHCAD and EXCEL analysis tools.
• Current Top Secret w/SCI Sensitive Compartmented Information security clearance held.

Product Design, Test and Integration of Power Amplifier and Matching Network Circuit Card Assemblies for an advanced military sub-surface sonar platform.

• Detailed Simulation and Analysis Orcad P-Spice and Mathcad .
• Circuit Card layout, component selection.
• Specification preparation.
• Customer Interface/Critical Design Review.

Acting senior systems engineer for the ADCAP torpedo program. This program was transitioned from the NG Cleveland facility which was closing to Annapolis. Rapidly declining staff and plant resources forced a greatly accelerated systems learning curve. Rapid diagnosis of transitioning production line problems significantly reduced product shipping delays. Customer satisfaction was evident through follow on equipment orders.

• Product test & troubleshooting.
• Depot Factory Test Equipment repair-maintenance.
• Detailed failure analysis of field returned subassemblies.
• Customer interface.

Electrical designer of equipment which monitors and controls US Navy reactor power plants and related systems. Product Design, Test and Integration of Power Supply, Signal Conditioning and Control Device Interface CCAs.

• FPGA programming Lattice 1048.
• Detailed design analysis and disclosure, PSpice and Excel.
• Recipient of the Northrop Timely Award Program for greatly under-running program cost and schedule objectives 3 months early on 1 year contract .

Developed and performed the analysis and reverse engineering process of a Foreign Military Export System. Specifically:

• Analysis of system supportability.
• Mean time before failure predictions.
• Overall system performance evaluations.
• Critical design review.

• Associate engineering functions in Technical Data Group.
• Developed and incorporated engineering change proposals, Revision Notices and Service Bulletins on APG-68 technical manuals.
• Performed editing, production and quality control functions.
• Documented discrete wiring and electrical specifications for various APG-68 Line Replaceable Units.

Responsible for the test and fabrication of multiple subassemblies used on current military platforms.

• Printed Wiring Assembly construction and test.
• Chassis definition, construction and test.
• Cable harness development, construction and test.
• Development of test fixtures and detailed test plans.
• Quality control and customer liaison as required.

The Johns Hopkins University, Baltimore, Maryland
Bachelors of Science in Electrical Engineering, May 1992
GPA - 3.2

Catonsville Community College, Catonsville, Maryland
Associate of Arts in Electronic Technology, May 1987
GPA - 4.0
Certificate in Digital Electronics, May 1987
GPA - 4.0

Harford Community College, Churchville, Maryland
Associate of Arts, May 1978
GPA - 3.02

Up

Personal

Department of Electrical & Computer Engineering
Montgomery University, AL

ECE Dept. Montgomery University, Montgomery, AL, Current
Ph.D Candidate, Graduation scheduled in 2002, Summer Dissertation finished
Major area: Power Electronics
Minor area: Control Systems

People University of Science and Technology, Harbin, China, June 1997
M.S., Electrical Engineering.

People University of Science and Technology, Harbin, China, July 1993
Diploma, Electrical Engineering.

Arts of modern power supply, UPS, ballast, motor drive, embedded control system and IC design related to power supply system, magnetic components, modeling, control, simulation, topologies, soft switching techniques for inverters and converters, power factor correction, motion control, etc.

Conducting research in soft-switching switching technique for inverters for motor drive and UPS

Developing switch power supply for industrial high power CO2 lasers

Developing power and control system for industrial high power CO2 lasers

Montgomery University Research Fellowship, 2001, 2002

• IEEE Student Member
• IEEE Power Electronics Society Student Member
• IEEE Industrial Electronics Society Student Member
• IEEE Industry Applications Society Student Member
• IEEE Control System Society Student Member
• IEEE Electron Devices Society Student Member

• Tae Dong and Gary Evans, "Simulation and Analysis of Three-Phase Auxiliary Resonant Commutated Pole Inverter for Induction Motor Drive" , 35th Intersociety Energy Conversion Engineering Conference, July 2001
• Bill Dillard, Tae Dong, R. Gary Evans, etc. "Comparison of DC-DC Converter Topologies for High Voltage SSP Systems" , 35th Intersociety Energy Conversion Engineering Conference, July 2001
• Tae Dong, Yang Yang and Jiarong Li, "A Real Time Power Monitor for High Power CO2 Laser", Instrument Technology China , pp19-21, January, 1997

• Tae Dong, Camille A. Arcidi, Gary Evans "Analysis and Simulation of Same Cycle Transient Control SCTC for Application in Voltage Regulator Modules VRMs" , 37th Intersociety Energy Conversion Engineering Conference, July 2002
• Tae Dong, Gary Evans, "A Low Cost Resonant Snubber Inverter for Uninterruptible Power Supply Application" 37th Intersociety Energy Conversion Engineering Conference, July 2002

• Tae Dong, Gary Evans, "State Plane Analysis of An Auxiliary Resonant Commutated Pole Inverter and Implementation With Load Current Adaptive Fixed Timing Control" , The 28th Annual Conference of the IEEE Industrial Electronics Society, Nov. 2002

• Proficiency in Power Electronics, converter and inverter design, including circuit, magnetic, modeling, control.
• Proficiency in microprocessor systems, embedded systems.
• Proficiency in computer simulation, including simulation in Pspice, Matlab and Simulink.
• Strong background in control, device, microelectronics and other related area in electrical engineering.
• Complete experience in electronics product design, develop circuit, programming, PCB design included , manufacture, field adjustment, technical documentation, and maintenance.
• EDA tools: Orcad Capture, Schematic, Layout, etc , Mentor Graphics, VHDL, Protel, Autocad, etc.

• Soft switching topologies for inverters are being studied, compared and simulated by Pspice, and prototypes built.
• A three-phase Auxiliary Resonant Commutated Pole ARCP inverter variable speed motor drive, a single phase Resonant Snubber Inverter for UPS and a coupled inductor zero-voltage switching three-phase inverter were built.
• This control scenario detects the load current direction at the output of the inverter to define the state of the inverter and control the auxiliary switches accordingly.
• These inverters are controlled by Analog Device !/ s ADMC401 motor control DSP, which generates space vector PWM signal at 20 KHz.
• With soft-switching technique, these inverters have the advantage of smooth commutation, reduced stress on the switches and EMI and enhanced efficiency.
• The soft switching technique, featuring independent control of each phase of inverter, can be used in field orientation control motor drive as well.

• Developing a 15 kW full bridge switchmode power converter for gas discharge to generate CO2 laser.
• Designed to work in industry application, over- current protection has been realized in the driving circuit of the IGBTs in the converter.
• To obtain 4kV output, nine transformers are carefully grouped in a matrix and sealed in water-cooled oil tank.
• This gas-discharge power supply is designed for high power CO2 laser to obtain continuous and pulsed laser out put.
• Experiments are being carried out and a successful on the prototype converter.

• A prototype full-bridge Series-Resonant Converter of 3KW to7KW was built for a high frequency discharge CO2 laser.
• The electrodes of the laser was covered by a layer of ceramic, thus formed a capacitor with the gaseous load flowing through.
• This capacitive load formed the main part of the resonance tank, which could be approximated as capacitors and resistor at the secondary side of the transformer.
• The converter operates at the resonant frequency with zero current switching.

• A microprocessor monitoring and control system was developed for high power CO2 lasers for industrial usage, using a single-chip microprocessor of 8097BH.
• Functions of multi-channel measuring, power supply control, interface of menu operation etc., were implemented on this system.
• As a system working in industrial environment, it was designed to withstand high EMI.
• The PCB layout was carefully designed by hand, the code was optimized, and data was well protected from interference.
• This microprocessor-based apparatus could be connected to IBM-PC by the series port.

• A microprocessor system was developed to measure and control the pressure of the mixed gas in the resonant chamber in high power CO2 laser for industrial production line.
• Single chip processor 8098 was used in this system to process signal form a silicon pressure sensor and a thermocouple tube, compensating the temperature drift in the silicon pressure sensor by numerical calculating, linearizing the output of the thermocouple tube.
• This product has been delivered in dozens and running for years on production line even today.

• Developed a real time power monitor of High power continuing working CO2 laser.
• A far-inferred detector for measurement of 2kw to 5kw laser beam was developed for this gauge, using thermal pile on ionized Aluminum.
• It was accomplished in the first few months after my college.
• It had been delivered in dozen and run on industrial production line for years till 1996 when better detector was developed.
• Circuit board did not change, not even now.

• Design and develop display circuit of an inferred television temperature measurement system, using a single chip processor 8031.
• The design and thesis received a grade of Excellent.

• Work with other two students to design an alarm system with Communication functions, priority responsibility is to develop a 1W out-put transmitter and receiver of 46.6 MHz to transfer digital signal.
• Second Prize of Excellent College Student s SCI. & TECH.
• Research Achievement of Hubei Province was awarded for this project.

Up

Summary

Senior Electrical Engineer with MSEE and 20+ years experience in Design/Development Engineering, Installation, Field Service, Product Support, Technical Marketing Support, Remote Technical Assistance.

• Strong communications skills
• Project Management/Team Leader/Member/Committee Chairman
• Hardware/Software design/troubleshooting
• Combined knowledge of product design from concept to field service

• Mentored several hardware/software Co-ops in project development and completion.
• Revived 2 stalled design projects in Food Automation. This produced a 200 board/month demand.
• Design, Development and Project Management for Diagnost EP-C/EP Table: Board redesign for lowered parts count/additional functionality. Managed Team of 3 technicians for custom assembly.
• "Difference is You!" award for teamwork in rapid assembly/interface of Bi-Plane Poly I at New York Hospital.
• "Difference is You!" award for resolving laser film imaging interface problems.
• Constructed and maintained departmental sub-LAN and CAD system.
• Low Noise TV camera development for Medical Digital Imaging.

• Image Quality representative for the USA: Quality Award for Quick Check Phantom development, presenter/planner/discussion leader at International IQ seminars, Leader SSR representatives
• CIS Product Support Engineer: Planned and Participated in Image Intensifier return review process which reduced returns and associated costs by 40 .
• PC Committee Chairman: Collected team from IT, Field Service and Project management. Developed Field Service Image Process and Laptop Loaner Policy so that no engineer would be without his service tool for more than 24 hours in case of failure.
• Tool and Test Equipment Product Support: Provided Technical Management of T&TE for the USA with technical and software interface to factory in the Netherlands.

• Designed and developed Access Database of Equipment specifications to be accessed by sales personnel for completion of Bid Specifications
• Wrote technical papers on Imaging subjects for Sales personnel and customers to clearly indicate Philips Image Quality Leadership.

• Analog/Digital/Microprocessor Design, PCB Design, Noise Testing/Debugging for Food Automation controls.
• Project Management from concept to design to production.
• Hardware/Software Integration and Testing.

• Provided technical support to the field for Imaging Systems and Image Quality.
• Interface with factory Netherlands on Image Quality, Tools and Test Equipment and Common Imaging Systems CIS .

• Provided technical support to field sales force with emphasis on challenging competitors claims.

• Performed electrical design and development of EP C-Arm and EP 80o tilting table.
• Supervised electromechanical assembly of EP system.
• Created calibration and Quality Assurance specifications for EP system.

• Accomplished design, development and production of interfaces to imaging equipment to overcome incompatibilities in different manufacturer s equipment.
• Created design and test specifications for potential interfaces.
• Evaluated third-party and Philips European equipment for suitability in the American market.

• Performed analog and video design for Raytheon Digital Imaging System.
• Designed add-on products for Medical Imaging Product Line.

• Participated in design, development and sustaining engineering for 80CI Ultrasound Cardiac Imager.

MS, Electrical Engineering, University of New Haven, West Haven, CT, 1982
BS, Electrical Engineering, Northeastern University, Boston, MA, 1975

• PCAD 2001 PCB layout/simulation
• Access/Access Basic
• PowerPoint
• Microsoft Word
• C Programming
• PLD/PLA programming
• Micro-Cap II/III
• DesignCAD
• Product Support Training--Cardiac Equipment
• Networking
• Surgery Equipment
• MCSE in process

Tau Beta Pi/Eta Kappa Nu Engineering/Electrical Engineering Honor Societies

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Experienced Project Manager / Engineer with experience directly supervising engineers of various disciplines; to include optics, electronics, mechanical, software and hydraulics. Hands on experience in the design and development of analog electronics for manufacturing process control, marine electronics, bio-electronics, communications, aerospace and instrumentation.

Owner and Consulting Engineer

• Made major contributions to the completion of the manufacturing processes and procedures for the "Power Probe", a radiation measuring diagnostic instrument for use during breast cancer surgery.

• Project Engineer for the successful completion of the state-of-the-art upgrade for the VHF receiver of a buoy tethered meteorological ocean probe.
• Project Engineering and designing circuitry to replace the obsolete design for a microwave transmitter oscillator of a balloon lofted meteorological atmospheric probe.

• Working with a webmaster, designed, developed and registered a website to market the company s precision coaxial cable assemblies.

• Thru reverse engineering and system troubleshooting, determine the extent of re-build required for a computer controlled printed circuit board tester.
• Performed a patent search to determine the feasibility and legality of a new design for an electronically controlled professional treadmill.
• Completed a number of component engineering analysis and searches.

• Project Engineer for the successful completion of the design and development of the electronics for the TAT-4000, a hand held, infrared sensing, body temperature-measuring instrument.

• Managed and contributed to the design, development and successful completion of the electronics for a precision multi-channel temperature measurement system Validator 2000 .
• Managed the test and component engineering support to manufacturing.
• Wrote the procedures for product testing to determine their Y2K Compliance.
• Made major contributions to the development of the mathematical non-linearity correction Algorithms for the Validator 2000.
• Assisted in the preparation of the Quality Assurance Test Cases for the Validator 2000.
• Member of the internal ISO 9000 auditor team.

• Utilizing the analog and digital trouble-shooting skills developed during previous positions in design/development and field service engineering, determined the "root cause", to the component level, of failures in industrial process monitoring transducers and sensors.

• By applying reverse engineering techniques to the previously designed sub-assemblies of a Hydrogen Maser Clock intended for orbit in space, determined the functionally critical parameters of these sub-assemblies, designed custom test equipment for their verification and prepared the test documentation detailing the procedures required.

• Designed a discrete micro-power system, for use by the telephone company at each subscriber s location, which allows the phone company to determine and differentiate between communication problems in the line and in the subscriber s facility.

• Designed, for a bio-electronically controlled prosthetic limb, a miniature high gain, low noise, low power preamplifier for detection, amplification and bandwidth limiting of the biological electrical signals myoelectronic from the muscles of an amputee s residual arm.

• Designed and developed a complete, ultrasonic kilohertz carrier range handheld speech communications transmitter / receiver system which utilized the acoustic propogation of an amplitude modulated ultrasonic carrier thru metallic structures.

Supervised and was a part of an electronics design team specializing in the development of underwater acoustics sonar electronic systems.

• Developed, installed and tested at-sea:
  • Sonar system for shallow water survey and mapping of the ocean.
  • Multi-channel sonar transmitter for a deep-water survey and mapping.
• Designed, developed and built prototype multi-channel sonar receiver.

Established my own software applications consulting service, supporting both the public and private sector.

• Developed a MAC system to manage labor and material manufacturing costs for an Investment casting firm.
• Developed a DOS system for the personnel records of a statewide Human Services Agency.

• Designed and developed more than 50 new production test systems per year.
• Implemented a preventive maintenance program for the more than 500 existing production testers.

Analog and digital circuit design of analytical instruments.

Senior Systems Engineer
Senior Design Engineer
Field Service Engineer
Quality Control Engineer

• N.C. STATE UNIVERSITY: BSEE
• IOWA STATE UNIVERSITY - General Purpose Switching Computers
• WATERS ASSOCIATES: Management Training
• NORTHEASTERN UNIVERSITY: Introduction to Digital Signal Processing
• APPLIED TECHNOLOGY INSTITUTE: Sonar Acoustic System Analysis

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Analytical problem-solving engineering professional with 20+ years of experience as an electro-mechanical technician armed with a new BS degree in Information Technology.
Specialized studies in programming and operating systems.
Team player with innovative ability to improve systems and procedures through detailed analysis, leadership and follow-through.

• Electronics: Digital and analog troubleshooting, RF circuits, relay logic, I/O drivers, High-voltage.
• Mechanical systems: Robotic and handling system repairs and adjustments. Pneumatics, hydraulics, and chemical controls.
• Programming: C++, VB
• Microsoft Office; Outlook, Excel, Word, PowerPoint, Visio, Access, SQL, MS Project.
• Reading or writing schematics, technical documentation, and specifications.
• Leadership, mentoring.
• Safety and Emergency Response Team

• Install wafer fabrication equipment to new facility clean-room.
• Maintain intense installation plan and schedule.
• Coordinate equipment facilitation and qualification by communicating needs to trades, project managers, engineering, and manufacturing personnel.

• Trouble-shoot and repair of production equipment in the Physical Vapor Deposition and Implant areas. Electronics, high-voltage, digital, RF and analog systems.
• Perform and develop preventive maintenance procedures.
• Work with engineering group in research and development experiments used to determine new integrated products.

• Maintained Nova 10-80, and Varian 300xp-350d ion implanters. Electro-mechanical trouble-shooting and repair, and preventive maintenance.
• Analog and digital circuit repair of both low and high voltage, RF trouble-shooting and calibrations, pneumatic and fluidic systems, and ultra-high vacuum system repair.
• Work with production group to maintain product output goals, and work with Equipment or Process Engineering to maintain or exceed system quality.

• Trouble-shoot and repair, ion implanters, sputter systems, backgrinders, and other support equipment. Electronics repair of digital, analog, RF and high-voltage systems.
• Perform equipment modifications, and improvements, maintain or update PM specs and procedures.
• Work with Equipment and Process engineering groups to solve manufacturing equipment problems in the PVD and Ion Implant areas. Improved productivity by modifying sub-assembly that resulted in a 2-3 million dollar improvement of good product output.
• Shift Assistant Leader then Leader of Emergency Response Team ERT .

• Maintain, modify, trouble-shoot metal deposition systems sputtering and evaporation . Electronics, RF, high-voltage, digital, and analog. Gas control systems.
• Maintain, modify, trouble-shoot ion implanters. Digital, analog, high-voltage, gas and chemical controls.
• Maintain, modify, trouble-shoot RF etchers/ashers, and CVD reactors.
• Was an Ass t. Supervisor, and was a member of the Emergency Response Team

• Performed maintenance, trouble-shooting, and repair of all the manufacturing equipment such as:
  • Aluminum sputters
  • wet etch and RF plasma systems
  • EPI reactors
  • Diffusion furnaces
  • photo-coat and developing systems
  • projection printing systems.
• Received a patent award for creating a backup gas-delivery supply switching system.
• Member of Incident Control Team.

University of Phoenix, Tempe, Arizona Aug, 2001
Bachelor of Science in Information Technology,
Programming / Operating Systems

DeVry Institute of Technology, Phoenix, Ariz. Sept. 1977
Associates of Applied Science Degree in Electronic Engineering Technology.

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To join a corporation as an Electrical Engineer with emphasis in Power Electronics, or Device Characterization area.

• Power Electronics: DC/DC PWM Converter buck, boost, flyback and forward , DC/AC Resonant converter ZCS and ZVS, Control, Motor Drive, Magnetic Design, EMI Analysis.
• Characterization and Modeling of Power Devices including IGBT, MOSFET and Power Diode
• Modeling and Simulation of Electrical Circuit System
• Embedded Control Systems: Interruption handling, Algorithm, I/0 Driver, Communication With Microprocessor 8051/8098 and Intel 8086/8088, Hardware-In-The-Loop, Micro-Controller PCB
• Analog and Digital Circuits Design, Digital Controller and VHDL
• Computer Skills:
  • OS: UNIX, WIN 2000, WIN NT
  • Software: C/C++, Matlab/Simulink, Spice, Saber, PASCAL, Assembly, dSpace, Eagle, LabView, Mathcad, VB, JAVA, etc.

Worked in the Power Electronics and Visual Test Bed VTB Group. Responsibility included DC/DC Power Converter Designing, Modeling and Simulation of power and Power Devices.

Responsible for DC/AC Power Inverter Projects and Microprocessor Application.

Worked in the Power Electronics group. Specialized in the Power Resonant Inverter Design

Responsible for Testing Electronic Instruments such as Signal Generators, Oscilloscopes, Logic Analyzer etc.

• 500W dSpace-control Boost Converter with Synergetic Control
• 1.5KW Hybrid DC/DC Power Converter with Fuel Cell and Battery
• 20KW /300KHZ Series-Resonant Inverter with MOSFETs For the Induction Heating Power Supply
• 10KW /50KHZ Parallel-Resonant Ultra-Sound Frequency Inverter with IGBTs
• Characterization and PSPICE Modeling of Trench-Punch-through IGBT and Power Diode, including Hard-switch and soft-switch testing, thermal analysis and parameterization.
• Slide Mode Control with Micro-Controller HC11 PCB C programming and Hardware
• Embedded Real Time Motor Control System Hardware-In-The-Loop
• Real-time Embedded Control System of the Water Spray Weaver Machine
• Microprocessor Monitoring System for 48V/450A AC/DC Telecommunication Push-Pull Power Amplifier
• Modeling of MOS Switches for VTB C++ programming
• Matlab/Simulink Simulation for the Motor Vector Control
• Simulation of Electrical Motors and Drives Under Different Reference Frames
• Simulation of the PEBB-based Converters for SPCO
• Multiagent technology Implementation in Computer Soccer Game With JAVA

Ph.D, Electrical Engineering, The University of South Carolina, Columbia, SC. GPA 3.9, 08/2002.
M.S., Electrical Engineering, Zhejiang University, Canton, China. GPA 3.8, 05/1995.
B.S., Electrical and Electronics Engineering, Sichuan University, Chengdu, China. GPA 3.8, 07/1990.

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